Please use this identifier to cite or link to this item: http://thuvienso.dut.udn.vn/handle/DUT/5810
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dc.contributor.advisorHuỳnh, Viết Thắngen_US
dc.contributor.advisorĐỗ, Nam Sơnen_US
dc.contributor.advisorĐinh, Quang Trườngen_US
dc.contributor.authorTrần, Minh Tríen_US
dc.contributor.authorĐỗ, Hoàng Phúcen_US
dc.contributor.authorVũ, Ngọc Khôien_US
dc.date.accessioned2025-04-01T09:53:29Z-
dc.date.available2025-04-01T09:53:29Z-
dc.date.issued2018-
dc.identifier.urihttp://thuvienso.dut.udn.vn/handle/DUT/5810-
dc.description117 tr.en_US
dc.description.abstractIn the era of accelerated-growing technology, Application-Specific Integrated Circuit (ASIC), which is a kind of integrated circuit that is specially built for a specific application or purpose, can be found in almost any electronic device and its uses can range from custom rendering of images to sound conversion. Because of the requirement of enhancing the speed and reducing power as well as cost, the emergence and development of ASIC is crucial and essential. Produce an ASIC successfully requests a mature process of many correlated and complex steps, in which, Physical Design is one of them. Physical Design, which is a step of the standard design cycle which follows after the Circuit Design, transforms a circuit description into the physical layout which describes the position of cells and routes for the interconnections between them. This step is usually split into several sub-steps, which include design, verification and validation of the layout. Physical Design is based on gate-level netlist generated from the Synthesis Process and uses the technology libraries that are provided by the fabrication houses. Technologies are commonly classified according to minimal feature size, i.e. 90nm, 65nm, 45nm, 28nm, 22nm, 18nm, 14nm, etc. In this project, we are going to design a layout for ARM Cortex-A7 CPU, which is a 32-bit microprocessor core licensed by ARM holdings implementing the ARMv7-A architecture. By optimizing Physical Design steps, we are aiming to reduce data transmission time inside the ARM module, hence, the layout can meet the frequency of 800 MHz, considered as a high-speed chip. Besides, TSMC 28nm technology is used in this project because it features high performance and low power consumption advantages plus seamless integration with its 28nm design ecosystem to enable faster time-to-market. The 28nm process technology supports a wide range of applications and highly prefer by customer.en_US
dc.language.isoenen_US
dc.publisherTrường Đại học Bách khoa - Đại học Đà Nẵngen_US
dc.subjectPhysical designen_US
dc.subjectTSMC 28NM Technologyen_US
dc.titlePhysical design on the ARM cortex-A7 CPU of a high graphic chip using TSMC 28NM Technologyen_US
dc.typeĐồ ánen_US
dc.identifier.id2.DA.FA.18.022-
item.openairecristypehttp://purl.org/coar/resource_type/c_18cf-
item.openairetypeĐồ án-
item.cerifentitytypePublications-
item.fulltextCó toàn văn-
item.languageiso639-1en-
item.grantfulltextrestricted-
Appears in Collections:DA.Điện tử - Viễn thông
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